1. Field of the Invention
The present invention relates to a thin film transistor (TFT) type liquid crystal display and a method of fabricating the same. In particular, the present invention relates to a high-resolution liquid crystal display which has an improved aperture ratio and high reliability as well as is simple in structure and capable of low-cost and high-yield fabrication, and a method of fabricating the same.
2. Description of the Related Art
An active matrix type liquid crystal display using thin film transistors (hereinafter, referred to as TFTs) as its switching elements comprises a TFT array substrate, a light shielding film (so-called black matrix), and a color filter substrate which are opposed to one another across liquid crystal. Pixel regions each having an independent TFT and a pixel electrode are arranged on the TFT array substrate in a matrix. On the color filter substrate are laminated a color layer and a transparent common electrode.
FIG. 1 is a circuit diagram showing the circuit configuration of a single pixel region in a conventional liquid crystal display. In FIG. 1, this liquid crystal display comprises a plurality of address lines 110a, 110b, . . . , a plurality of address lines 120a, 120b, . . . , a liquid crystal element 130, a TFT section 140, and a storage capacitance section 150. The address lines 110a, 110b, . . . are formed on an insulative substrate. The data lines 120a, 120b, . . . are formed thereon across a gate insulating film so as to cross the address lines 110a, 110b, . . . . The liquid crystal element 130 is formed in a pixel region P1 that is enclosed with the address lines 110a, 110b and the data lines 120a, 120b. The TFT section 140 drives the liquid crystal element 130. The storage capacitance section 150 stores capacitance in parallel with the liquid crystal element 130.
The address lines 110a, 110b, . . . are driven by an address line driver (not shown), so that a signal for forming a scanning line on the screen of the liquid crystal display is transmitted to the TFT section 140 in the pixel region P1.
The data lines 120a, 120b, . . . are driven by a data line driver (not shown), so as to transmit an image signal to the TFT section 140 in this pixel region P1.
The liquid crystal element 130 consists of a pixel electrode 131, liquid crystal 132, and a counter electrode 133. The pixel electrode 131 and the liquid crystal 132 spread throughout the pixel region P1. The counter electrode 133, opposed to the pixel electrode 131 across the liquid crystal 132, is common to the entire screen of the liquid crystal display. This counter electrode 133 is connected to a con potential COM. Both the pixel electrode 131 and the counter electrode 133 are formed of an ITO (indium-tin oxide) or other transparent conductive film.
The TFT section 140 consists of a gate 141 extended from the address line 110a, an electrode (hereinafter, referred to as drain electrode) 142 extended from the data line 120a, and an electrode (hereinafter, referred to as source electrode) 143 connected to the pixel electrode 131. The scanning line signal applied to the gate 141 selectively connects the drain electrode 142 and the source electrode 143 to each other so that the image signal supplied through the data line 120a is transmitted to the pixel electrode 131.
The storage capacitance section 150 is provided so that when the address line 110b becomes non-selected, a liquid crystal driving potential applied to the pixel electrode 131 at that moment is retained until a next scanning line signal is applied to the gate 141. This prevents the liquid crystal driving potential from leaking to drop through the TFT section 140 and the like and shifting the liquid crystal 132 into an inactive mode to cause a change in color density. In the example of FIG. 1, the storage capacitance section 150 is formed between the address line 110b of an adjacent pixel region P2 and the storage capacitance electrode 151 in this pixel region P1. While a scanning line signal is applied to the pixel region P1 the address line 110b in the adjacent pixel region P2 is non-selected, and is supplied with a constant potential of the order of xe2x88x9210 V from a driver IC (not shown). This makes it possible to use the address line 110b as a common electrode 152 in the storage capacitance section 150.
In some other examples of the liquid crystal display, the common electrode to be opposed to the storage capacitance electrode 151 is not extended from the address line 110b in the adjacent pixel region P2. In such cases, auxiliary capacitance common wiring is additionally laid between the address lines 110a and 110b, and this auxiliary capacitance cannon wiring is used as the common electrode 152 opposed to the storage capacitance electrode 150.
FIGS. 2 and 3 show the typical constitution of a pixel region in a conventional liquid crystal display, the pixel region having the circuit configuration shown in FIG. 1. FIG. 2 is a plan view showing the pixel region in a conventional liquid crystal display. FIG. 3 is a sectional view taken along the line Ixe2x80x94I of FIG. 2.
In FIGS. 2 and 3, this liquid crystal display comprises address lines 110b and 110b formed on an insulative substrate 101. A gate insulating film 102 is formed thereon. Moreover, data lines 120a and 120b cross the address lines 110a and 110b are formed thereon. A pixel electrode 131 is arranged in a pixel region P1 enclosed with the address lines 110a, 110b and the data lines 120a, 120b. Also formed in this pixel region P1 is a TFT section 140 which includes a gate 141 extended from the address line 110a, a drain electrode 142 extended from the data line 120a, and a source electrode 143 connected to the pixel electrode 131. The connection between the source electrode 143 and the pixel electrode 131 is established by a conductive through hole 135 piercing through an upper insulating film 103. In this liquid crystal display, one end of the pixel electrode 131 is extended until it overlaps the address line 110b, so as to form a storage capacitance electrode 151. Accordingly, a storage capacitance section 150 is constituted with the address line 110b as a common electrode 152.
In the liquid crystal display shown in FIGS. 2 and 3, however, the storage capacitance electrode 151 and the can electrode 152 sandwiched both the gate insulating film 102 and the upper insulating film 103, i.e., dielectric layers of greater thickness. Therefore, per-area capacitance was small. On this account, a method has been devised in which a part of the address line 110b is extended into the pixel region as the common electrode 152 to increase the area of the storage capacitance section 150. Nevertheless, the non-transparent storage capacitance section made it difficult to secure both a sufficient aperture ratio and capacitance within the given pixel region, producing a problem of darker images.
FIG. 4 is a sectional view showing a pixel region in another conventional liquid crystal display. To solve the problem, the following structure has been proposed. That is, as shown in FIG. 4, the storage capacitance electrode 151 was formed over the address line 110b across the gate insulating film 102 by using the same metal film that constitutes the source electrode 143. This storage capacitance electrode 151 was connected to the pixel electrode 131 via a conductive through hole 136 piercing through the upper insulating film 103.
Recently, increased demand for high-resolution liquid crystal displays has shifted the dimensions of the pixel regions from a conventional order of e.g. 100 xcexcmxc3x97300 xcexcm to a latest order of 40 xcexcmxc3x97120 xcexcm. This not only demands higher working precision, but also requires that factors deteriorating the pixel aperture ratio be eliminated from the pixel regions as much as possible. Accordingly the configuration of FIG. 4 has become a problem in that a single pixel region requires two conductive through holes 135 and 136. That is, the formation of the conductive through holes 135, 136 had some limit in working precision. In particular, when the upper insulating film 103 used a thick film such as an organic insulative film for the sake of planarization, the size of through holes to be formed in this organic insulative film could be reduced only to a certain limit. For example, under existing processes, it is extremely difficult to form conductive through holes of 10 xcexcmxc3x9710 xcexcm or smaller with precision and with high yields. Thus, the presence of the two conductive through holes 135, 136 in a single pixel region has contributed to significant deterioration of the aperture ratio in high-resolution liquid crystal displays. For example, if a high-resolution pixel region of 40 xcexcmxc3x97120 xcexcm contains the two conductive through holes 135, 136 having the above-mentioned dimensions, the aperture ratio is no higher than 49%.
To solve the foregoing problems associated with the aperture ratio in high-resolution liquid crystal displays, the present inventors have devised to make the conductive through holes single. A similar technology in this view, Japanese Patent Laid-Open Publication No. Hei 9-152625, has proposed a liquid crystal display of single through hole type shown in FIGS. 5 and 6, for example. FIG. 5 is a plan view showing a pixel region in the conventional liquid crystal display of single through hole type. FIG. 6. is a sectional view taken along the line IIxe2x80x94II of FIG. 5. In FIGS. 5 and 6, this liquid crystal display comprises address lines 210a and 210b formed on a transparent insulative substrate 201. Across a gate insulating film 202, data lines 220a and 220b crossing the address lines 210a and 210b are formed to constitute a pixel region. These data lines 220a and 220b have a double-layer structure consisting of a transparent conductive film 221 below and a metal film 222 above. This pixel region includes a gate 241, a drain electrode 242, a source electrode 243, wiring 253, a storage capacitance electrode 251, a pixel electrode 231, and a metal layer 254. The gate 241 is extended from the address line 210a. The drain electrode 242, consisting of an n+ type amorphous silicon film, is connected to a protrusion of the data line 220a extended into the pixel region. The source electrode 243, consisting of an n+ type amorphous silicon film, is to be selectively connected to the drain electrode 242 under a signal applied to the gate 241. The wiring 253, consisting of a transparent conductive film, is connected to a terminal of the source electrode 243. The storage capacitance electrode 251 is integrally extended from the wiring 253. The pixel electrode 231 is formed thereon across an upper insulating film 203, and is connected to the storage capacitance electrode 251 via a conductive though hole 236 that pierces through the upper insulating film 203. The metal layer 254 is arranged on the junction between the source electrode 243 and the wiring 253. This structure involves only a single conductive through hole (the conductive through hole 236), and thereby achieves an increase in aperture ratio.
Nevertheless, the liquid crystal display of single through hole type described above was hardly applicable due to the following problems. That is, in this type, the wiring 253 and the storage capacitance electrode 251 consisting of a transparent conductive film, typically of ITO, were formed between the gate insulating film 202 and the upper insulating film 203. This meant an additional patterning as compared with other conventional types. Then, the ITO patterning used aqua regia, whereas the drain electrode 242 and the source electrode 243 in the TFT section were formed of n+ type amorphous silicon films which dissolve in aqua regia. Therefore, an additional step for protecting the electrodes was required. Moreover, because the patterning of transparent conductive films is rather poor in working precision as compared with metal films, the storage capacitance electrode 251 patterned out of a transparent conductive film has more capacitance variations or defects. Accordingly, the pixels varied in image stability, which produced unevenness in the entire screen view. Furthermore, the wiring 253 was directly connected to the source electrode 243 made of an n+ type amorphous silicon film, whereas the connecting interface between an ITO film and an n+ type amorphous silicon film is high in contact resistance. This made a capacitance-charging time delay not-negligibly large, thereby hampering sufficient charging.
An object of the present invention is to provide a liquid crystal display, particularly of high resolution, which has an improved aperture ratio and high reliability as well as is simple in structure and capable of low-cost and high-yield fabrication, and which can neglect the capacitance-charging time delay, and a method of fabricating the same.
A liquid crystal display according to the present invention comprises: an insulative substrate; a plurality of address lines formed on the insulative substrate; a gate insulating film formed over said address lines; a plurality of data lines formed to cross said address lines provided said gate insulating film between said address lines and said data lines; an upper insulating film formed over said data lines; a pixel electrode formed on said upper insulating film in each of pixel regions enclosed with said address lines and said data lines, said pixel electrode consisting of a transparent conductive film for applying a potential to liquid crystal in respective pixel region; a thin film transistor section arranged in each of said pixel regions, said thin film transistor section having a gate connected to said address line and a pair of electrodes, one of which is connected to said data line, and selectively establishing connection between electrode connected to said data line and other electrode under a signal applied to their gate; a storage capacitance electrode arranged in each of said pixel regions, said storage capacitance electrode storing capacitance with a common electrode connected to said address line of adjacent pixel region or with an auxiliary capacitance common wiring formed on said insulative substrate so as to pass through said respective pixel region; a wiring connecting said storage capacitance electrode and said other electrode of said thin film transistor section; and a conductive through hole formed over said storage capacitance electrode and connects said storage capacitance electrode and said pixel electrode; wherein said storage capacitance electrode and said other electrode of said thin film transistor section that is connected to said pixel electrode through said wiring, said storage capacitance electrode and said conductive through hole are integrally formed of the same metal film.
In the present invention, each pixel region contains only a single conductive through hole. Therefore, particularly in a high-resolution liquid crystal display, the aperture ratio is improved as compared with the conventional pixel configuration which requires two conductive through holes. Moreover, the storage capacitance electrodes and the source electrodes are integrally formed of the same metal films. This permits the storage capacitance electrodes and the source electrodes to be formed in a single patterning operation, so that the fabrication are simplified to allow low-cost fabrication of the liquid crystal display. Furthermore, the integral formation of the storage capacitance electrodes and the source electrodes using the same metal films avoids the production of contact resistance between the electrodes, which eliminates charging delays. Besides, the precision workability of metal films enhances the pattern precision of the storage capacitance electrodes, and suppresses defects and capacitance variations.
In the present invention, for example, the storage capacitance electrodes are connected to the source electrodes of the thin film transistor section via wiring, and the wiring and the storage capacitance electrodes are arranged so as to overlap common electrodes across the gate insulating film. Accordingly, the common electrodes not only overlap the storage capacitance electrode but also overlap the wiring to allow an increase in storage capacitance.
Besides, for example, the common electrodes and the wiring are formed in a same width, and the common electrodes and the wiring are arranged so as to misalign with each other in a width direction. Alignment offsets in exposure systems can be compensated for by increasing the width of either the common electrodes or the wiring. However, this increasing of the width of either the common electrode or the wiring make aperture ratio lower. According to the present invention, since the common electrodes and the wiring have a same width and they are misaligned in a width direction, a drop in aperture ratio can be suppressed.
Moreover, the connecting portions of the storage capacitance electrodes to the conductive through holes, and the address lines or the auxiliary capacitance common wiring are arranged, for example, so as not to overlap each other across the gate insulating film.
Furthermore, the conductive through holes for establishing connection between the storage capacitance electrodes and the pixel electrodes are formed by, for example, etching the upper insulating film. If the storage capacitance electrodes have any chipped pattern on this etching, the etching can extend to the gate insulating film through the chipped portion, so that the through hole could reach the address line or the auxiliary capacitance common wiring below. When this through hole were subjected to a conductive treatment, leakage could occur between the storage capacitance electrode and the address line or the auxiliary capacitance common electrode. Nevertheless, the connecting portions of the storage capacitance electrodes to the conductive through holes, and the address lines or the auxiliary capacitance common wiring are arranged so as not to overlap each other across the gate insulating film. Therefore, the through holes, even if they reach the gate insulating film below, will not cause any leakage since no address line or auxiliary capacitance common wiring lies below.
Besides, for example, etch protective layers are arranged between the gate insulating film and the connecting portions of the storage capacitance electrodes to the conductive through holes. When the etch protective layers are arranged between the gate insulating film and the portions of the storage capacitance electrodes at which the conductive through holes come into connection, the etching protective layers block through holes from reaching the gate insulating film even if some storage capacitance electrodes have a chipped pattern. Thus, it is possible to avoid the deterioration of product yields resulting from leakage.
Moreover, the etch protective layers each are formed of e.g. an amorphous silicon film. Amorphous silicon films will not be eroded in the above-mentioned etching, and thus have the function of protecting the gate insulating film.
Furthermore, the data lines are shaped, for example, like a band of constant width. The drain electrodes of the TFT sections are formed to be included inside these band-shaped data lines. The inclusion of the drain electrodes in the band-shaped data lines prevents the drain-electrode portions of the TFT sections from protruding into the pixel regions, so that the aperture ratios of the pixel regions can be improved by that amount. Meanwhile, the drain electrodes are formed over the entire channel widths of the TFT sections, whereby the contact resistance between the drain electrodes and the channel layers are reduced for enhanced data write speed.
Additionally, the upper insulating film has, for example, a double-layer structure consisting of a first upper insulating film made of a silicon nitride film and a second upper insulating film made of an organic film. A color filter or a black matrix may be arranged between the first upper insulating film and the second upper insulating film.
A method of fabricating a liquid crystal display according to the present invention comprises: forming a plurality of address lines on an insulative substrate, and gates extended from said address lines in respective pixel regions; forming a gate insulating film over said address lines and said gates; forming, on said gate insulating film, a plurality of data lines crossing said address lines to make said pixel regions, in thin film transistor sections of said respective pixel regions, electrodes extended from said data lines and electrodes to be connected to pixel electrodes, and storage capacitance electrodes integrally extended from said electrodes to be connected to pixel electrodes by using the same metal films, said storage capacitance electrodes storing capacitance with said address lines of adjacent pixel regions; forming an upper insulating film over said data lines, said electrodes, and said storage capacitance electrodes; forming through holes in said upper insulating film so as to reach said storage capacitance electrodes; and forming said pixel electrodes on said upper insulating film as well as establishing connection between said pixel electrodes and said storage capacitance electrodes via said through holes.
According to the fabrication method of the present invention, a liquid crystal display can be fabricated which stores capacitance in between the storage capacitance electrodes and the address lines of adjacent pixel regions. Here, the data lines, the drain and source electrodes of the TFT sections, and the storage capacitance electrodes integrally extended from the source electrodes by using the same metal films can be formed together in a single patterning. This eliminates the need for an additional patterning for forming the storage capacitance electrodes. Besides, the use of metal films makes it possible to form the storage capacitance electrodes with high working precision.
Another method of fabricating a liquid crystal display according to the present invention comprises: forming a plurality of address lines on an insulative substrate, along with gates extended from said address lines and auxiliary capacitance common wiring in respective pixel regions; forming a gate insulating film over said address lines, said gates, and said auxiliary capacitance common wiring; forming, on said gate insulating film, a plurality of data lines crossing said address lines to make said pixel regions, in thin film transistor sections of said respective pixel regions, electrodes extended from said data lines and electrodes to be connected to pixel electrodes, and storage capacitance electrodes integrally extended from said electrodes to be connected to pixel electrodes by using the same metal films, said storage capacitance electrodes storing capacitance with said auxiliary capacitance common wiring; forming an upper insulating film over said data lines, said electrodes, and said storage capacitance electrodes; forming through holes in said upper insulating film so as to reach said storage capacitance electrodes; and forming said pixel electrodes on said upper insulating film as well as establishing connection between said pixel electrodes and said storage capacitance electrodes via said through holes.
According to this another fabrication method of the present invention, a liquid crystal display can be fabricated which stores capacitance in between the auxiliary capacitance common wiring and the storage capacitance electrodes. Again, the data lines, the drain and source electrodes of the TFT sections, and the storage capacitance electrodes integrally extended from the source electrodes by using the same metal films can be formed together in a single patterning. This eliminates the need for an additional patterning for forming the storage capacitance electrodes. Besides, the use of metal films makes it possible to form the storage capacitance electrodes with high working precision.
In the present invention, the forming the gate insulating film are followed by, for example, the provision of etch protective layers between the gate insulating film and the storage capacitance electrodes. Accordingly, even if the storage capacitance electrodes have any chipped pattern or the like on the following pattering of etching the upper insulating film to form through holes that reach the storage capacitance electrodes, the through holes can be precluded from eroding the gate insulating film for leakage.
For example, the etch protective layers are formed by using an amorphous silicon film while channel layers and contact layers each consisting of an amorphous silicon film are formed in the TFT sections on the gate insulating film. That is, the formation of the TFT sections in the pixel regions generally involves forming channel layers and contact layers on the gate insulating film out of amorphous silicon films. Thus, simultaneously with the formation of the channel layers and the contact layers, the same amorphous silicon films as those in the TFT sections can be formed beneath the connecting positions of the storage capacitance electrodes to the conductive through holes to form the etch protective layers with no additional patterning.
The nature, principle, and utility of the invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings in which like parts are designated by like reference numerals or characters.